The present invention relates in general to methods of fabrication and semiconductor structures, and more particularly, to methods of fabrication and semiconductor structures in high dielectric constant (high K), metal gate technology relating to resistors and electrically programmable fuses (e-fuses).
The standard materials for semiconductors have been silicon dioxide as a gate oxide and polysilicon as the gate electrode. To fabricate semiconductors at the 45 nanometer (nm) node, advanced technology processes use high k dielectric materials for the gate dielectric layer along with metals other than polysilicon for the gate electrode. Such devices may be referred to as high k/metal gate (HKMG) semiconductors. The high k gate dielectric layer is generally deposited directly on a silicon substrate and a metal gate electrode is formed on the high k gate dielectric layer. As transistors have decreased in size, the thickness of the silicon dioxide gate dielectric has steadily decreased. However, with the thinning of the silicon dioxide comes the problem of leakage currents due to tunneling through the silicon dioxide. Replacing the silicon dioxide dielectric with a high K material reduces leakage effects. Metal gates are used for increased conductivity.
With HKMG technology, the passive devices (resistor and e-fuse) have a metal layer and a silicon stack. Due to the high conductivity of the metal underneath the silicon stack, the resistance has been lower than the required target. In one proposed manufacturing method, the silicon stack on the passive device side is thinner than on the active device side which could cause the passive device to work improperly. As the gate height is scaled to reduce the gate to contact array overlap capacitance, this problem could worsen.
Accordingly, it is a purpose of the present invention to have a method of fabrication and structure for a HKMG technology device in which the silicon stack on the passive device is of sufficient thickness so that the passive device operates properly.